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MythMash: Frontside Bus - Bottleneck or Room to Grow?

By Bill Machrone

Faster processors. Dual and quad cores. More memory. Bigger programs. Multithreading. Multitasking. Huge datasets. Monster graphics boards. Ever-faster DDR memory.

The motherboard has gotten to be a very busy place. Every component plays a vital role, and the frontside bus is no exception.

Microprocessors have changed dramatically over the last couple of decades, from subscalar designs that needed multiple clock cycles to perform a single instruction to today’s superscalar chips that perform multiple instructions per tick. The frontside or main memory bus was a busy thoroughfare, carrying all of the processor’s memory reads and writes, plus access to memory-mapped I/O devices and system peripherals. As processor clock speeds increased and instructions started to be interleaved, the frontside bus, or FSB, running at a lackadaisical 33MHz, didn’t necessarily keep pace because faster memory was expensive and standards were somewhat ingrained.

Fortunately, the old 33MHz bus is a distant memory. The modern FSB doesn’t connect directly to memory but to a sophisticated memory controller, part of the northbridge chip, which also drives the PCIe bus and may contain a graphics controller as well.

The question remains: can the FSB handle the additional burdens from multithreaded applications, multiple applications, and highly demanding applications such as video codecs and games? For that matter, what about dual-core and quad-core chips running at 2 and 3GHz? More processing cores means even more threads, more data being crunched, more memory reads and writes, more everything.

The short answer is yes.

The FSB still has plenty of headroom. The longer answer explains why. Read on for a deep-dive about FSB utilization and how the Core™ memory sub-system.


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