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26.06.2007
Example Workloads
The chart below shows the results of running three applications, each with a reputation for taxing systems heavily, the first is a game, F.E.A.R.*, which is commonly used to benchmark high-performance computers and their graphics subsystems. It allows adjustment of the number of calculations for the physics of objects on the screen, the amount of detail in rendering, even the audio fidelity. In this and the other tests, the Intel VTune™ Performance Analyzer simply counted the number of bus clock cycles against the actual number of transfers. In this case, roughly 16.5 trillion cycles were available, but only 375 million were used, for a utilization of 4.53 percent. Clearly, the memory bus is not a bottleneck; it’s barely used
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“The frontside bus is simply not limited in typical home or desktop applications, says Ronen Zohar, an Intel Principal Engineer. “Workstation applications may tax the bus more heavily, but there are no scaling issues on dual-core, quad core and eventual octo (dual quad-core) packages.”
Zohar’s observations are borne out by tests with the DivX encoder and Photoshop applications, which incurred 3.82 and 5.23 percent utilization respectively.
“Most of the utilization is not generated by the program load instructions,” says Zohar, “but by prefetch operations which runs ahead of the actual loads to hide the memory latency —the hardware anticipating and preloading the data the program will need.”
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